Samy Al Bahra
12 years ago
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adbdfe6633
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.\"
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.\" Copyright 2013 Samy Al Bahra.
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\"
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.Dd May 18, 2013
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.Dt CK_PR_FENCE_LOAD_ATOMIC 3
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.Sh NAME
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.Nm ck_pr_fence_load_atomic
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.Nd enforce ordering of load operations to atomic read-modify-write operations
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.Sh LIBRARY
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Concurrency Kit (libck, \-lck)
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.Sh SYNOPSIS
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.In ck_pr.h
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.Ft void
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.Fn ck_pr_fence_load_atomic void
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.Ft void
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.Fn ck_pr_fence_strict_load_atomic void
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.Sh DESCRIPTION
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This function enforces the ordering of any memory load
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and
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.Fn ck_pr_load 3
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operations with respect to store operations relative to
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the invocation of the function. Any store operations that
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were committed on remote processors
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and received by the calling processor before the invocation of
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.Fn ck_pr_fence_load_atomic
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is also be made visible only after a call to
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the ck_pr_fence_load family of functions.
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This function always serves as an implicit compiler barrier.
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On architectures with CK_MD_TSO or CK_MD_PSO specified (total store ordering
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and partial store ordering respectively), this operation only serves
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as a compiler barrier and no fence instructions will be emitted. To
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force the unconditional emission of a load fence, use
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.Fn ck_pr_fence_strict_load_atomic .
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Architectures implementing CK_MD_RMO always emit a fence.
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.Sh EXAMPLE
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.Bd -literal -offset indent
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#include <ck_pr.h>
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static unsigned int a;
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static unsigned int b;
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void
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function(void)
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{
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unsigned int snapshot_a, snapshot_b;
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snapshot_a = ck_pr_load_uint(&a);
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/*
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* Guarantee that the load from "a" completes
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* before the update to "b".
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*/
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ck_pr_fence_load_atomic();
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ck_pr_fas_uint(&b, 1);
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return;
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}
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.Ed
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.Sh RETURN VALUES
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This function has no return value.
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.Sh SEE ALSO
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.Xr ck_pr_stall 3 ,
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.Xr ck_pr_fence_atomic 3 ,
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.Xr ck_pr_fence_atomic_store 3 ,
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.Xr ck_pr_fence_atomic_load 3 ,
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.Xr ck_pr_fence_load_depends 3 ,
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.Xr ck_pr_fence_load_store 3 ,
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.Xr ck_pr_fence_store 3 ,
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.Xr ck_pr_fence_memory 3 ,
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.Xr ck_pr_barrier 3 ,
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.Xr ck_pr_fas 3 ,
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.Xr ck_pr_load 3 ,
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.Xr ck_pr_store 3 ,
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.Xr ck_pr_faa 3 ,
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.Xr ck_pr_inc 3 ,
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.Xr ck_pr_dec 3 ,
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.Xr ck_pr_neg 3 ,
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.Xr ck_pr_not 3 ,
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.Xr ck_pr_add 3 ,
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.Xr ck_pr_sub 3 ,
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.Xr ck_pr_and 3 ,
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.Xr ck_pr_or 3 ,
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.Xr ck_pr_xor 3 ,
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.Xr ck_pr_cas 3 ,
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.Xr ck_pr_btc 3 ,
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.Xr ck_pr_bts 3 ,
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.Xr ck_pr_btr 3
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.Pp
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Additional information available at http://concurrencykit.org/
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@ -0,0 +1,113 @@
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.\"
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.\" Copyright 2013 Samy Al Bahra.
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
|
||||
.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\"
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.Dd May 18, 2013
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.Dt CK_PR_FENCE_LOAD_STORE 3
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.Sh NAME
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.Nm ck_pr_fence_load_store
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.Nd enforce ordering of load operations to store operations
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.Sh LIBRARY
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Concurrency Kit (libck, \-lck)
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.Sh SYNOPSIS
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.In ck_pr.h
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.Ft void
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.Fn ck_pr_fence_load_store void
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.Ft void
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.Fn ck_pr_fence_strict_load_store void
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.Sh DESCRIPTION
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This function enforces the ordering of any memory load
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and
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.Fn ck_pr_load 3
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operations with respect to store operations relative to
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the invocation of the function. Any store operations that
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were committed on remote processors
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and received by the calling processor before the invocation of
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.Fn ck_pr_fence_load_store
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is also be made visible only after a call to
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the ck_pr_fence_load family of functions.
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This function always serves as an implicit compiler barrier.
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On architectures with CK_MD_TSO or CK_MD_PSO specified (total store ordering
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and partial store ordering respectively), this operation only serves
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as a compiler barrier and no fence instructions will be emitted. To
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force the unconditional emission of a load fence, use
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.Fn ck_pr_fence_strict_load_store .
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Architectures implementing CK_MD_RMO always emit a fence.
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.Sh EXAMPLE
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.Bd -literal -offset indent
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#include <ck_pr.h>
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static unsigned int a;
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static unsigned int b;
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void
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function(void)
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{
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unsigned int snapshot_a;
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snapshot_a = ck_pr_load_uint(&a);
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/*
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* Guarantee that the load from "a" completes
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* before the store to "b".
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*/
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ck_pr_fence_load_store();
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ck_pr_store_uint(&b, 1);
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return;
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}
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.Ed
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.Sh RETURN VALUES
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This function has no return value.
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.Sh SEE ALSO
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.Xr ck_pr_stall 3 ,
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.Xr ck_pr_fence_atomic 3 ,
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.Xr ck_pr_fence_atomic_store 3 ,
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.Xr ck_pr_fence_atomic_load 3 ,
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.Xr ck_pr_fence_load_depends 3 ,
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.Xr ck_pr_fence_load_atomic 3 ,
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.Xr ck_pr_fence_store 3 ,
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.Xr ck_pr_fence_memory 3 ,
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.Xr ck_pr_barrier 3 ,
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.Xr ck_pr_fas 3 ,
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.Xr ck_pr_load 3 ,
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.Xr ck_pr_store 3 ,
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.Xr ck_pr_faa 3 ,
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.Xr ck_pr_inc 3 ,
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.Xr ck_pr_dec 3 ,
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.Xr ck_pr_neg 3 ,
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.Xr ck_pr_not 3 ,
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.Xr ck_pr_add 3 ,
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.Xr ck_pr_sub 3 ,
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.Xr ck_pr_and 3 ,
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.Xr ck_pr_or 3 ,
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.Xr ck_pr_xor 3 ,
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.Xr ck_pr_cas 3 ,
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.Xr ck_pr_btc 3 ,
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.Xr ck_pr_bts 3 ,
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.Xr ck_pr_btr 3
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.Pp
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Additional information available at http://concurrencykit.org/
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