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@ -491,17 +491,10 @@ ck_pr_cas_64_value(uint64_t *t, uint64_t c, uint64_t s, uint64_t *v)
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} comp;
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} comp;
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uint32_t *val = (uint32_t *)v;
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uint32_t *val = (uint32_t *)v;
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set.s = s;
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ck_pr_store_64(&comp.c, c)
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comp.c = c;
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ck_pr_store_64(&set.s, s);
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#ifdef __PIC__
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#ifdef __PIC__
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/*
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* Note the setz being done in memory. This is because if we allow
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* gcc to pick a register, it seems to want to pick BL, which is
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* obviously clobbered as soon as we pop EBX. The rest of the
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* registers are taken, so we don't have any outside storage for
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* this. This also affects ck_pr_cas_32_2_value.
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*/
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__asm__ __volatile__("pushl %%ebx;"
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__asm__ __volatile__("pushl %%ebx;"
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"movl %7, %%ebx;"
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"movl %7, %%ebx;"
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CK_PR_LOCK_PREFIX "cmpxchg8b %a3; setz %2;"
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CK_PR_LOCK_PREFIX "cmpxchg8b %a3; setz %2;"
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@ -509,7 +502,7 @@ ck_pr_cas_64_value(uint64_t *t, uint64_t c, uint64_t s, uint64_t *v)
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: "=a" (val[0]),
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: "=a" (val[0]),
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"=d" (val[1]),
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"=d" (val[1]),
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"=q" (z)
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"=q" (z)
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: "p" (t),
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: "p" (&t[0]),
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"a" (comp.v[0]),
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"a" (comp.v[0]),
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"d" (comp.v[1]),
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"d" (comp.v[1]),
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"c" (set.v[1]),
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"c" (set.v[1]),
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@ -577,12 +570,12 @@ ck_pr_cas_32_2_value(uint32_t target[2], uint32_t compare[2], uint32_t set[2], u
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#ifdef __PIC__
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#ifdef __PIC__
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__asm__ __volatile__("pushl %%ebx;"
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__asm__ __volatile__("pushl %%ebx;"
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"movl %7, %%ebx;"
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"movl %7, %%ebx;"
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CK_PR_LOCK_PREFIX "cmpxchg8b %a4; setz %2;"
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CK_PR_LOCK_PREFIX "cmpxchg8b %a3; setz %2;"
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"popl %%ebx;"
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"popl %%ebx;"
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: "=a" (v[0]),
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: "=a" (v[0]),
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"=d" (v[1]),
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"=d" (v[1]),
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"=q" (z)
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"=q" (z)
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: "p" (target),
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: "p" (&target[0]),
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"a" (compare[0]),
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"a" (compare[0]),
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"d" (compare[1]),
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"d" (compare[1]),
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"c" (set[1]),
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"c" (set[1]),
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