These primitives are meant to be used in lock implementations where control dependency ordering is sufficient to enforce ordering of critical section. At the moment, this only affects PPC. Currently, we rely on lwsync for entry into critical sections which is insufficient. sync is rather heavy-weight, and assuming we aren't falling victim into compiler re-ordering, isync should be sufficient. There is follow-up work to be done in ARM, as we may have cheaper (but target-specialized) ISB-tricks for load-load ordering.ck_pring
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