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@ -79,33 +79,33 @@ arch_context_switch(struct arch_context *a, struct arch_context *b)
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reg_t *a_registers = a->regs, *b_registers = b->regs;
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assert(a_registers && b_registers);
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asm volatile("mov x0, sp\n\t"
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"adr x1, reset%=\n\t"
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"str x1, [%[a], 8]\n\t"
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"str x0, [%[a]]\n\t"
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"mov x0, #1\n\t"
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"str x0, [%[av]]\n\t"
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"ldr x1, [%[bv]]\n\t"
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"sub x1, x1, #2\n\t"
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"cbz x1, slow%=\n\t"
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"ldr x0, [%[b]]\n\t"
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"ldr x1, [%[b], 8]\n\t"
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"mov sp, x0\n\t"
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"br x1\n\t"
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"slow%=:\n\t"
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"br %[slowpath]\n\t"
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".align 8\n\t"
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"reset%=:\n\t"
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"mov x1, #3\n\t"
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"str x1, [%[bv]]\n\t"
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".align 8\n\t"
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"exit%=:\n\t"
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:
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: [a] "r"(a_registers), [b] "r"(b_registers), [av] "r"(&a->variant), [bv] "r"(&b->variant),
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[slowpath] "r"(&arch_context_restore_preempted)
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: "memory", "cc", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12",
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"x13", "x14", "x15", "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24", "d8", "d9",
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"d10", "d11", "d12", "d13", "d14", "d15");
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__asm__ volatile("mov x0, sp\n\t"
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"adr x1, reset%=\n\t"
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"str x1, [%[a], 8]\n\t"
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"str x0, [%[a]]\n\t"
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"mov x0, #1\n\t"
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"str x0, [%[av]]\n\t"
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"ldr x1, [%[bv]]\n\t"
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"sub x1, x1, #2\n\t"
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"cbz x1, slow%=\n\t"
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"ldr x0, [%[b]]\n\t"
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"ldr x1, [%[b], 8]\n\t"
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"mov sp, x0\n\t"
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"br x1\n\t"
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"slow%=:\n\t"
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"br %[slowpath]\n\t"
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".align 8\n\t"
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"reset%=:\n\t"
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"mov x1, #3\n\t"
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"str x1, [%[bv]]\n\t"
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".align 8\n\t"
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"exit%=:\n\t"
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:
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: [a] "r"(a_registers), [b] "r"(b_registers), [av] "r"(&a->variant), [bv] "r"(&b->variant),
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[slowpath] "r"(&arch_context_restore_preempted)
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: "memory", "cc", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11",
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"x12", "x13", "x14", "x15", "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24",
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"d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15");
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return 0;
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}
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