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@ -1,96 +1,58 @@
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#pragma once
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#include <stdint.h>
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#include <unistd.h>
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#include <ucontext.h>
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#include "arch/common.h"
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#include "arch_context.h"
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#define ARCH_NREGS (2) /* SP + PC only */
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#define ARCH_SIG_JMP_OFF 0x100 /* Based on code generated! */
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/**
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* ARM64 code. Currently Unimplemented
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* Initializes a context, zeros out registers, and sets the Instruction and
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* Stack pointers
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* @param actx arch_context to init
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* @param ip value to set instruction pointer to
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* @param sp value to set stack pointer to
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*/
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typedef uint64_t reg_t;
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struct arch_context {
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reg_t regs[ARCH_NREGS];
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mcontext_t mctx;
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};
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extern __thread struct arch_context worker_thread_base_context;
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/* Initialized a context, zeroing out registers and setting the Instruction and Stack pointers */
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static inline void
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arch_context_init(struct arch_context *actx, reg_t ip, reg_t sp)
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{
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memset(&actx->mctx, 0, sizeof(mcontext_t));
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memset((void *)actx->regs, 0, sizeof(reg_t) * ARCH_NREGS);
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*(actx->regs) = sp;
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*(actx->regs + 1) = ip;
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}
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static int
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arch_mcontext_restore(mcontext_t *mc, struct arch_context *ctx)
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{
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assert(ctx != &worker_thread_base_context);
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/*
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* if ctx->regs[0] is set, this was last in a user-level context switch state!
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* else restore mcontext..
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*/
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if (ctx->regs[0]) {
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mc->sp = ctx->regs[0];
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mc->pc = ctx->regs[1] + ARCH_SIG_JMP_OFF;
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ctx->regs[0] = 0;
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return 1;
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} else {
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memcpy(mc, &ctx->mctx, sizeof(mcontext_t));
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memset(&ctx->mctx, 0, sizeof(mcontext_t));
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}
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memset((void *)actx->regs, 0, sizeof(reg_t) * UREG_COUNT);
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return 0;
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}
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static void
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arch_mcontext_save(struct arch_context *ctx, mcontext_t *mc)
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{
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assert(ctx != &worker_thread_base_context);
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ctx->regs[0] = 0;
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memcpy(&ctx->mctx, mc, sizeof(mcontext_t));
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actx->regs[UREG_RSP] = sp;
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actx->regs[UREG_RIP] = ip;
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}
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/**
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* @param current - the registers and context of the thing running
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* @param next - the registers and context of what we're switching to
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* @return always returns 0, indicating success
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*
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* NULL in either of these values indicates the "no sandbox to execute" state,
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* which defaults to resuming execution of main
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*/
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static inline int
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arch_context_switch(struct arch_context *ca, struct arch_context *na)
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arch_context_switch(struct arch_context *current, struct arch_context *next)
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{
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if (!ca) {
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assert(na);
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/* switching from "no sandbox to execute" state to "executing a sandbox" */
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ca = &worker_thread_base_context;
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} else if (!na) {
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assert(ca);
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/* Assumption: Software Interrupts are disabled by caller */
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assert(!software_interrupt_is_enabled());
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/* switching from "executing a sandbox" to "no execution" state. */
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na = &worker_thread_base_context;
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} else {
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assert(na && ca);
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/* if both current and next are NULL, there is no state change */
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assert(current != NULL || next != NULL);
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/* switching between sandboxes. */
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}
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/* Assumption: The caller does not switch to itself */
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assert(current != next);
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reg_t *cr = ca->regs, *nr = na->regs;
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assert(cr && nr);
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/* Set any NULLs to worker_thread_base_context to resume execution of main */
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if (current == NULL) current = &worker_thread_base_context;
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if (next == NULL) next = &worker_thread_base_context;
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reg_t *current_registers = current->regs, *next_registers = next->regs;
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assert(current_registers && next_registers);
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asm volatile("mov x0, sp\n\t"
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"adr x1, reset%=\n\t"
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"str x1, [%[curr], 8]\n\t"
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"str x0, [%[curr]]\n\t"
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"str x1, [%[current], 8]\n\t"
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"str x0, [%[current]]\n\t"
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"ldr x2, [%[next]]\n\t"
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"cbz x2, slow%=\n\t"
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"ldr x3, [%[next], 8]\n\t"
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@ -105,9 +67,11 @@ arch_context_switch(struct arch_context *ca, struct arch_context *na)
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".align 8\n\t"
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"exit%=:\n\t"
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:
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: [ curr ] "r"(cr), [ next ] "r"(nr), [ slowpath ] "r"(&arch_context_mcontext_restore)
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: [ current ] "r"(current_registers), [ next ] "r"(next_registers),
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[ slowpath ] "r"(&arch_context_mcontext_restore)
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: "memory", "cc", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12",
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"x13", "x14", "x15", "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26",
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"d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15");
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return 0;
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}
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