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546 lines
14 KiB
546 lines
14 KiB
/*
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* Copyright 2009-2014 Samy Al Bahra.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _CK_PR_X86_64_H
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#define _CK_PR_X86_64_H
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#ifndef _CK_PR_H
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#error Do not include this file directly, use ck_pr.h
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#endif
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#include <ck_cc.h>
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#include <ck_md.h>
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#include <ck_stdint.h>
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#include <stdbool.h>
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/*
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* The following represent supported atomic operations.
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* These operations may be emulated.
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*/
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#include "ck_f_pr.h"
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/*
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* Support for TSX extensions.
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*/
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#ifdef CK_MD_RTM_ENABLE
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#include "ck_pr_rtm.h"
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#endif
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/* Minimum requirements for the CK_PR interface are met. */
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#define CK_F_PR
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#ifdef CK_MD_UMP
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#define CK_PR_LOCK_PREFIX
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#else
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#define CK_PR_LOCK_PREFIX "lock "
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#endif
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/*
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* Prevent speculative execution in busy-wait loops (P4 <=)
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* or "predefined delay".
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*/
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CK_CC_INLINE static void
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ck_pr_stall(void)
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{
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__asm__ __volatile__("pause" ::: "memory");
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return;
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}
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#define CK_PR_FENCE(T, I) \
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CK_CC_INLINE static void \
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ck_pr_fence_strict_##T(void) \
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{ \
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__asm__ __volatile__(I ::: "memory"); \
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}
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CK_PR_FENCE(atomic, "sfence")
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CK_PR_FENCE(atomic_store, "sfence")
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CK_PR_FENCE(atomic_load, "mfence")
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CK_PR_FENCE(store_atomic, "sfence")
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CK_PR_FENCE(load_atomic, "mfence")
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CK_PR_FENCE(load, "lfence")
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CK_PR_FENCE(load_store, "mfence")
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CK_PR_FENCE(store, "sfence")
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CK_PR_FENCE(store_load, "mfence")
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CK_PR_FENCE(memory, "mfence")
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CK_PR_FENCE(release, "mfence")
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CK_PR_FENCE(acquire, "mfence")
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#undef CK_PR_FENCE
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/*
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* Atomic fetch-and-store operations.
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*/
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#define CK_PR_FAS(S, M, T, C, I) \
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CK_CC_INLINE static T \
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ck_pr_fas_##S(M *target, T v) \
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{ \
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__asm__ __volatile__(I " %0, %1" \
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: "+m" (*(C *)target), \
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"+q" (v) \
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: \
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: "memory"); \
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return v; \
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}
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CK_PR_FAS(ptr, void, void *, char, "xchgq")
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#define CK_PR_FAS_S(S, T, I) CK_PR_FAS(S, T, T, T, I)
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CK_PR_FAS_S(double, double, "xchgq")
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CK_PR_FAS_S(char, char, "xchgb")
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CK_PR_FAS_S(uint, unsigned int, "xchgl")
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CK_PR_FAS_S(int, int, "xchgl")
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CK_PR_FAS_S(64, uint64_t, "xchgq")
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CK_PR_FAS_S(32, uint32_t, "xchgl")
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CK_PR_FAS_S(16, uint16_t, "xchgw")
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CK_PR_FAS_S(8, uint8_t, "xchgb")
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#undef CK_PR_FAS_S
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#undef CK_PR_FAS
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/*
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* Atomic load-from-memory operations.
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*/
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#define CK_PR_LOAD(S, M, T, C, I) \
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CK_CC_INLINE static T \
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ck_pr_load_##S(const M *target) \
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{ \
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T r; \
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__asm__ __volatile__(I " %1, %0" \
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: "=q" (r) \
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: "m" (*(C *)target) \
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: "memory"); \
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return (r); \
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}
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CK_PR_LOAD(ptr, void, void *, char, "movq")
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#define CK_PR_LOAD_S(S, T, I) CK_PR_LOAD(S, T, T, T, I)
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CK_PR_LOAD_S(char, char, "movb")
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CK_PR_LOAD_S(uint, unsigned int, "movl")
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CK_PR_LOAD_S(int, int, "movl")
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CK_PR_LOAD_S(double, double, "movq")
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CK_PR_LOAD_S(64, uint64_t, "movq")
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CK_PR_LOAD_S(32, uint32_t, "movl")
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CK_PR_LOAD_S(16, uint16_t, "movw")
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CK_PR_LOAD_S(8, uint8_t, "movb")
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#undef CK_PR_LOAD_S
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#undef CK_PR_LOAD
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CK_CC_INLINE static void
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ck_pr_load_64_2(const uint64_t target[2], uint64_t v[2])
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{
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__asm__ __volatile__("movq %%rdx, %%rcx;"
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"movq %%rax, %%rbx;"
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CK_PR_LOCK_PREFIX "cmpxchg16b %2;"
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: "=a" (v[0]),
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"=d" (v[1])
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: "m" (*(const uint64_t *)target)
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: "rbx", "rcx", "memory", "cc");
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return;
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}
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CK_CC_INLINE static void
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ck_pr_load_ptr_2(void *t, void *v)
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{
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ck_pr_load_64_2(t, v);
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return;
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}
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#define CK_PR_LOAD_2(S, W, T) \
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CK_CC_INLINE static void \
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ck_pr_load_##S##_##W(const T t[2], T v[2]) \
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{ \
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ck_pr_load_64_2((const uint64_t *)(const void *)t, \
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(uint64_t *)(void *)v); \
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return; \
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}
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CK_PR_LOAD_2(char, 16, char)
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CK_PR_LOAD_2(int, 4, int)
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CK_PR_LOAD_2(uint, 4, unsigned int)
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CK_PR_LOAD_2(32, 4, uint32_t)
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CK_PR_LOAD_2(16, 8, uint16_t)
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CK_PR_LOAD_2(8, 16, uint8_t)
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#undef CK_PR_LOAD_2
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/*
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* Atomic store-to-memory operations.
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*/
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#define CK_PR_STORE_IMM(S, M, T, C, I, K) \
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CK_CC_INLINE static void \
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ck_pr_store_##S(M *target, T v) \
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{ \
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__asm__ __volatile__(I " %1, %0" \
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: "=m" (*(C *)target) \
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: K "q" (v) \
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: "memory"); \
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return; \
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}
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#define CK_PR_STORE(S, M, T, C, I) \
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CK_CC_INLINE static void \
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ck_pr_store_##S(M *target, T v) \
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{ \
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__asm__ __volatile__(I " %1, %0" \
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: "=m" (*(C *)target) \
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: "q" (v) \
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: "memory"); \
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return; \
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}
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CK_PR_STORE_IMM(ptr, void, const void *, char, "movq", CK_CC_IMM_U32)
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CK_PR_STORE(double, double, double, double, "movq")
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#define CK_PR_STORE_S(S, T, I, K) CK_PR_STORE_IMM(S, T, T, T, I, K)
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CK_PR_STORE_S(char, char, "movb", CK_CC_IMM_S32)
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CK_PR_STORE_S(int, int, "movl", CK_CC_IMM_S32)
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CK_PR_STORE_S(uint, unsigned int, "movl", CK_CC_IMM_U32)
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CK_PR_STORE_S(64, uint64_t, "movq", CK_CC_IMM_U32)
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CK_PR_STORE_S(32, uint32_t, "movl", CK_CC_IMM_U32)
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CK_PR_STORE_S(16, uint16_t, "movw", CK_CC_IMM_U32)
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CK_PR_STORE_S(8, uint8_t, "movb", CK_CC_IMM_U32)
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#undef CK_PR_STORE_S
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#undef CK_PR_STORE_IMM
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#undef CK_PR_STORE
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/*
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* Atomic fetch-and-add operations.
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*/
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#define CK_PR_FAA(S, M, T, C, I) \
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CK_CC_INLINE static T \
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ck_pr_faa_##S(M *target, T d) \
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{ \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %1, %0" \
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: "+m" (*(C *)target), \
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"+q" (d) \
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: \
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: "memory", "cc"); \
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return (d); \
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}
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CK_PR_FAA(ptr, void, uintptr_t, char, "xaddq")
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#define CK_PR_FAA_S(S, T, I) CK_PR_FAA(S, T, T, T, I)
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CK_PR_FAA_S(char, char, "xaddb")
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CK_PR_FAA_S(uint, unsigned int, "xaddl")
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CK_PR_FAA_S(int, int, "xaddl")
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CK_PR_FAA_S(64, uint64_t, "xaddq")
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CK_PR_FAA_S(32, uint32_t, "xaddl")
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CK_PR_FAA_S(16, uint16_t, "xaddw")
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CK_PR_FAA_S(8, uint8_t, "xaddb")
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#undef CK_PR_FAA_S
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#undef CK_PR_FAA
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/*
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* Atomic store-only unary operations.
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*/
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#define CK_PR_UNARY(K, S, T, C, I) \
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CK_PR_UNARY_R(K, S, T, C, I) \
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CK_PR_UNARY_V(K, S, T, C, I)
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#define CK_PR_UNARY_R(K, S, T, C, I) \
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CK_CC_INLINE static void \
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ck_pr_##K##_##S(T *target) \
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{ \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %0" \
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: "+m" (*(C *)target) \
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: \
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: "memory", "cc"); \
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return; \
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}
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#define CK_PR_UNARY_V(K, S, T, C, I) \
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CK_CC_INLINE static void \
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ck_pr_##K##_##S##_zero(T *target, bool *r) \
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{ \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %0; setz %1" \
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: "+m" (*(C *)target), \
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"=m" (*r) \
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: \
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: "memory", "cc"); \
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return; \
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}
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#define CK_PR_UNARY_S(K, S, T, I) CK_PR_UNARY(K, S, T, T, I)
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#define CK_PR_GENERATE(K) \
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CK_PR_UNARY(K, ptr, void, char, #K "q") \
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CK_PR_UNARY_S(K, char, char, #K "b") \
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CK_PR_UNARY_S(K, int, int, #K "l") \
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CK_PR_UNARY_S(K, uint, unsigned int, #K "l") \
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CK_PR_UNARY_S(K, 64, uint64_t, #K "q") \
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CK_PR_UNARY_S(K, 32, uint32_t, #K "l") \
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CK_PR_UNARY_S(K, 16, uint16_t, #K "w") \
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CK_PR_UNARY_S(K, 8, uint8_t, #K "b")
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CK_PR_GENERATE(inc)
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CK_PR_GENERATE(dec)
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CK_PR_GENERATE(neg)
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/* not does not affect condition flags. */
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#undef CK_PR_UNARY_V
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#define CK_PR_UNARY_V(a, b, c, d, e)
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CK_PR_GENERATE(not)
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#undef CK_PR_GENERATE
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#undef CK_PR_UNARY_S
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#undef CK_PR_UNARY_V
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#undef CK_PR_UNARY_R
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#undef CK_PR_UNARY
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/*
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* Atomic store-only binary operations.
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*/
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#define CK_PR_BINARY(K, S, M, T, C, I, O) \
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CK_CC_INLINE static void \
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ck_pr_##K##_##S(M *target, T d) \
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{ \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %1, %0" \
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: "+m" (*(C *)target) \
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: O "q" (d) \
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: "memory", "cc"); \
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return; \
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}
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#define CK_PR_BINARY_S(K, S, T, I, O) CK_PR_BINARY(K, S, T, T, T, I, O)
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#define CK_PR_GENERATE(K) \
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CK_PR_BINARY(K, ptr, void, uintptr_t, char, #K "q", CK_CC_IMM_U32) \
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CK_PR_BINARY_S(K, char, char, #K "b", CK_CC_IMM_S32) \
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CK_PR_BINARY_S(K, int, int, #K "l", CK_CC_IMM_S32) \
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CK_PR_BINARY_S(K, uint, unsigned int, #K "l", CK_CC_IMM_U32) \
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CK_PR_BINARY_S(K, 64, uint64_t, #K "q", CK_CC_IMM_U32) \
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CK_PR_BINARY_S(K, 32, uint32_t, #K "l", CK_CC_IMM_U32) \
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CK_PR_BINARY_S(K, 16, uint16_t, #K "w", CK_CC_IMM_U32) \
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CK_PR_BINARY_S(K, 8, uint8_t, #K "b", CK_CC_IMM_U32)
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CK_PR_GENERATE(add)
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CK_PR_GENERATE(sub)
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CK_PR_GENERATE(and)
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CK_PR_GENERATE(or)
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CK_PR_GENERATE(xor)
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#undef CK_PR_GENERATE
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#undef CK_PR_BINARY_S
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#undef CK_PR_BINARY
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/*
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* Atomic compare and swap.
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*/
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#define CK_PR_CAS(S, M, T, C, I) \
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CK_CC_INLINE static bool \
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ck_pr_cas_##S(M *target, T compare, T set) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %2, %0; setz %1" \
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: "+m" (*(C *)target), \
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"=a" (z) \
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: "q" (set), \
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"a" (compare) \
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: "memory", "cc"); \
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return z; \
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}
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CK_PR_CAS(ptr, void, void *, char, "cmpxchgq")
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#define CK_PR_CAS_S(S, T, I) CK_PR_CAS(S, T, T, T, I)
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CK_PR_CAS_S(char, char, "cmpxchgb")
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CK_PR_CAS_S(int, int, "cmpxchgl")
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CK_PR_CAS_S(uint, unsigned int, "cmpxchgl")
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CK_PR_CAS_S(double, double, "cmpxchgq")
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CK_PR_CAS_S(64, uint64_t, "cmpxchgq")
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CK_PR_CAS_S(32, uint32_t, "cmpxchgl")
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CK_PR_CAS_S(16, uint16_t, "cmpxchgw")
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CK_PR_CAS_S(8, uint8_t, "cmpxchgb")
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#undef CK_PR_CAS_S
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#undef CK_PR_CAS
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/*
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* Compare and swap, set *v to old value of target.
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*/
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#define CK_PR_CAS_O(S, M, T, C, I, R) \
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CK_CC_INLINE static bool \
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ck_pr_cas_##S##_value(M *target, T compare, T set, M *v) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX "cmpxchg" I " %3, %0;" \
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"mov %% " R ", %2;" \
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"setz %1;" \
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: "+m" (*(C *)target), \
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"=a" (z), \
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"=m" (*(C *)v) \
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: "q" (set), \
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"a" (compare) \
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: "memory", "cc"); \
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return z; \
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}
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CK_PR_CAS_O(ptr, void, void *, char, "q", "rax")
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#define CK_PR_CAS_O_S(S, T, I, R) \
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CK_PR_CAS_O(S, T, T, T, I, R)
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CK_PR_CAS_O_S(char, char, "b", "al")
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CK_PR_CAS_O_S(int, int, "l", "eax")
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CK_PR_CAS_O_S(uint, unsigned int, "l", "eax")
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CK_PR_CAS_O_S(double, double, "q", "rax")
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CK_PR_CAS_O_S(64, uint64_t, "q", "rax")
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CK_PR_CAS_O_S(32, uint32_t, "l", "eax")
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CK_PR_CAS_O_S(16, uint16_t, "w", "ax")
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CK_PR_CAS_O_S(8, uint8_t, "b", "al")
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#undef CK_PR_CAS_O_S
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#undef CK_PR_CAS_O
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/*
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* Contrary to C-interface, alignment requirements are that of uint64_t[2].
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*/
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CK_CC_INLINE static bool
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ck_pr_cas_64_2(uint64_t target[2], uint64_t compare[2], uint64_t set[2])
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{
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bool z;
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__asm__ __volatile__("movq 0(%4), %%rax;"
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"movq 8(%4), %%rdx;"
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CK_PR_LOCK_PREFIX "cmpxchg16b %0; setz %1"
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: "+m" (*target),
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"=q" (z)
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: "b" (set[0]),
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"c" (set[1]),
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"q" (compare)
|
|
: "memory", "cc", "%rax", "%rdx");
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|
return z;
|
|
}
|
|
|
|
CK_CC_INLINE static bool
|
|
ck_pr_cas_ptr_2(void *t, void *c, void *s)
|
|
{
|
|
return ck_pr_cas_64_2(t, c, s);
|
|
}
|
|
|
|
CK_CC_INLINE static bool
|
|
ck_pr_cas_64_2_value(uint64_t target[2],
|
|
uint64_t compare[2],
|
|
uint64_t set[2],
|
|
uint64_t v[2])
|
|
{
|
|
bool z;
|
|
|
|
__asm__ __volatile__(CK_PR_LOCK_PREFIX "cmpxchg16b %0;"
|
|
"setz %3"
|
|
: "+m" (*target),
|
|
"=a" (v[0]),
|
|
"=d" (v[1]),
|
|
"=q" (z)
|
|
: "a" (compare[0]),
|
|
"d" (compare[1]),
|
|
"b" (set[0]),
|
|
"c" (set[1])
|
|
: "memory", "cc");
|
|
return z;
|
|
}
|
|
|
|
CK_CC_INLINE static bool
|
|
ck_pr_cas_ptr_2_value(void *t, void *c, void *s, void *v)
|
|
{
|
|
return ck_pr_cas_64_2_value(t, c, s, v);
|
|
}
|
|
|
|
#define CK_PR_CAS_V(S, W, T) \
|
|
CK_CC_INLINE static bool \
|
|
ck_pr_cas_##S##_##W(T t[W], T c[W], T s[W]) \
|
|
{ \
|
|
return ck_pr_cas_64_2((uint64_t *)(void *)t, \
|
|
(uint64_t *)(void *)c, \
|
|
(uint64_t *)(void *)s); \
|
|
} \
|
|
CK_CC_INLINE static bool \
|
|
ck_pr_cas_##S##_##W##_value(T *t, T c[W], T s[W], T *v) \
|
|
{ \
|
|
return ck_pr_cas_64_2_value((uint64_t *)(void *)t, \
|
|
(uint64_t *)(void *)c, \
|
|
(uint64_t *)(void *)s, \
|
|
(uint64_t *)(void *)v); \
|
|
}
|
|
|
|
CK_PR_CAS_V(double, 2, double)
|
|
CK_PR_CAS_V(char, 16, char)
|
|
CK_PR_CAS_V(int, 4, int)
|
|
CK_PR_CAS_V(uint, 4, unsigned int)
|
|
CK_PR_CAS_V(32, 4, uint32_t)
|
|
CK_PR_CAS_V(16, 8, uint16_t)
|
|
CK_PR_CAS_V(8, 16, uint8_t)
|
|
|
|
#undef CK_PR_CAS_V
|
|
|
|
/*
|
|
* Atomic bit test operations.
|
|
*/
|
|
#define CK_PR_BT(K, S, T, P, C, I) \
|
|
CK_CC_INLINE static bool \
|
|
ck_pr_##K##_##S(T *target, unsigned int b) \
|
|
{ \
|
|
bool c; \
|
|
__asm__ __volatile__(CK_PR_LOCK_PREFIX I "; setc %1" \
|
|
: "+m" (*(C *)target), \
|
|
"=q" (c) \
|
|
: "q" ((P)b) \
|
|
: "memory", "cc"); \
|
|
return c; \
|
|
}
|
|
|
|
#define CK_PR_BT_S(K, S, T, I) CK_PR_BT(K, S, T, T, T, I)
|
|
|
|
#define CK_PR_GENERATE(K) \
|
|
CK_PR_BT(K, ptr, void, uint64_t, char, #K "q %2, %0") \
|
|
CK_PR_BT_S(K, uint, unsigned int, #K "l %2, %0") \
|
|
CK_PR_BT_S(K, int, int, #K "l %2, %0") \
|
|
CK_PR_BT_S(K, 64, uint64_t, #K "q %2, %0") \
|
|
CK_PR_BT_S(K, 32, uint32_t, #K "l %2, %0") \
|
|
CK_PR_BT_S(K, 16, uint16_t, #K "w %w2, %0")
|
|
|
|
CK_PR_GENERATE(btc)
|
|
CK_PR_GENERATE(bts)
|
|
CK_PR_GENERATE(btr)
|
|
|
|
#undef CK_PR_GENERATE
|
|
#undef CK_PR_BT
|
|
|
|
#endif /* _CK_PR_X86_64_H */
|
|
|