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420 lines
11 KiB
420 lines
11 KiB
/*
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* Copyright 2009-2015 Samy Al Bahra.
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* Copyright 2011 Devon H. O'Dell <devon.odell@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef CK_PR_X86_H
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#define CK_PR_X86_H
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#ifndef CK_PR_H
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#error Do not include this file directly, use ck_pr.h
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#endif
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#include <ck_cc.h>
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#include <ck_md.h>
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#include <ck_stdint.h>
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/*
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* The following represent supported atomic operations.
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* These operations may be emulated.
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*/
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#include "ck_f_pr.h"
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/* Minimum requirements for the CK_PR interface are met. */
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#define CK_F_PR
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/*
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* Prevent speculative execution in busy-wait loops (P4 <=) or "predefined
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* delay".
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*/
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CK_CC_INLINE static void
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ck_pr_stall(void)
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{
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__asm__ __volatile__("pause" ::: "memory");
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return;
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}
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#ifdef CK_MD_UMP
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#define CK_PR_LOCK_PREFIX
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#define CK_PR_FENCE(T, I) \
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CK_CC_INLINE static void \
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ck_pr_fence_strict_##T(void) \
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{ \
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__asm__ __volatile__("" ::: "memory"); \
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return; \
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}
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#else
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#define CK_PR_LOCK_PREFIX "lock "
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#define CK_PR_FENCE(T, I) \
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CK_CC_INLINE static void \
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ck_pr_fence_strict_##T(void) \
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{ \
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__asm__ __volatile__(I ::: "memory"); \
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return; \
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}
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#endif /* CK_MD_UMP */
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#if defined(CK_MD_SSE_DISABLE)
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/* If SSE is disabled, then use atomic operations for serialization. */
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#define CK_MD_X86_MFENCE "lock addl $0, (%%esp)"
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#define CK_MD_X86_SFENCE CK_MD_X86_MFENCE
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#define CK_MD_X86_LFENCE CK_MD_X86_MFENCE
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#else
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#define CK_MD_X86_SFENCE "sfence"
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#define CK_MD_X86_LFENCE "lfence"
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#define CK_MD_X86_MFENCE "mfence"
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#endif /* !CK_MD_SSE_DISABLE */
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CK_PR_FENCE(atomic, "")
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CK_PR_FENCE(atomic_store, "")
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CK_PR_FENCE(atomic_load, "")
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CK_PR_FENCE(store_atomic, "")
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CK_PR_FENCE(load_atomic, "")
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CK_PR_FENCE(load, CK_MD_X86_LFENCE)
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CK_PR_FENCE(load_store, CK_MD_X86_MFENCE)
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CK_PR_FENCE(store, CK_MD_X86_SFENCE)
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CK_PR_FENCE(store_load, CK_MD_X86_MFENCE)
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CK_PR_FENCE(memory, CK_MD_X86_MFENCE)
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CK_PR_FENCE(release, CK_MD_X86_MFENCE)
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CK_PR_FENCE(acquire, CK_MD_X86_MFENCE)
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CK_PR_FENCE(acqrel, CK_MD_X86_MFENCE)
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CK_PR_FENCE(lock, CK_MD_X86_MFENCE)
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CK_PR_FENCE(unlock, CK_MD_X86_MFENCE)
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#undef CK_PR_FENCE
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/*
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* Atomic fetch-and-store operations.
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*/
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#define CK_PR_FAS(S, M, T, C, I) \
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CK_CC_INLINE static T \
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ck_pr_fas_##S(M *target, T v) \
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{ \
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__asm__ __volatile__(I " %0, %1" \
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: "+m" (*(C *)target), \
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"+q" (v) \
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: \
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: "memory"); \
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return v; \
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}
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CK_PR_FAS(ptr, void, void *, char, "xchgl")
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#define CK_PR_FAS_S(S, T, I) CK_PR_FAS(S, T, T, T, I)
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CK_PR_FAS_S(char, char, "xchgb")
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CK_PR_FAS_S(uint, unsigned int, "xchgl")
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CK_PR_FAS_S(int, int, "xchgl")
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CK_PR_FAS_S(32, uint32_t, "xchgl")
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CK_PR_FAS_S(16, uint16_t, "xchgw")
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CK_PR_FAS_S(8, uint8_t, "xchgb")
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#undef CK_PR_FAS_S
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#undef CK_PR_FAS
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#define CK_PR_LOAD(S, M, T, C, I) \
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CK_CC_INLINE static T \
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ck_pr_md_load_##S(const M *target) \
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{ \
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T r; \
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__asm__ __volatile__(I " %1, %0" \
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: "=q" (r) \
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: "m" (*(const C *)target) \
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: "memory"); \
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return (r); \
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}
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CK_PR_LOAD(ptr, void, void *, char, "movl")
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#define CK_PR_LOAD_S(S, T, I) CK_PR_LOAD(S, T, T, T, I)
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CK_PR_LOAD_S(char, char, "movb")
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CK_PR_LOAD_S(uint, unsigned int, "movl")
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CK_PR_LOAD_S(int, int, "movl")
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CK_PR_LOAD_S(32, uint32_t, "movl")
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CK_PR_LOAD_S(16, uint16_t, "movw")
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CK_PR_LOAD_S(8, uint8_t, "movb")
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#undef CK_PR_LOAD_S
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#undef CK_PR_LOAD
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#define CK_PR_STORE(S, M, T, C, I) \
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CK_CC_INLINE static void \
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ck_pr_md_store_##S(M *target, T v) \
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{ \
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__asm__ __volatile__(I " %1, %0" \
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: "=m" (*(C *)target) \
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: CK_CC_IMM "q" (v) \
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: "memory"); \
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return; \
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}
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CK_PR_STORE(ptr, void, const void *, char, "movl")
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#define CK_PR_STORE_S(S, T, I) CK_PR_STORE(S, T, T, T, I)
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CK_PR_STORE_S(char, char, "movb")
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CK_PR_STORE_S(uint, unsigned int, "movl")
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CK_PR_STORE_S(int, int, "movl")
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CK_PR_STORE_S(32, uint32_t, "movl")
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CK_PR_STORE_S(16, uint16_t, "movw")
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CK_PR_STORE_S(8, uint8_t, "movb")
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#undef CK_PR_STORE_S
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#undef CK_PR_STORE
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/*
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* Atomic fetch-and-add operations.
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*/
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#define CK_PR_FAA(S, M, T, C, I) \
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CK_CC_INLINE static T \
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ck_pr_faa_##S(M *target, T d) \
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{ \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %1, %0" \
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: "+m" (*(C *)target), \
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"+q" (d) \
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: \
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: "memory", "cc"); \
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return (d); \
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}
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CK_PR_FAA(ptr, void, uintptr_t, char, "xaddl")
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#define CK_PR_FAA_S(S, T, I) CK_PR_FAA(S, T, T, T, I)
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CK_PR_FAA_S(char, char, "xaddb")
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CK_PR_FAA_S(uint, unsigned int, "xaddl")
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CK_PR_FAA_S(int, int, "xaddl")
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CK_PR_FAA_S(32, uint32_t, "xaddl")
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CK_PR_FAA_S(16, uint16_t, "xaddw")
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CK_PR_FAA_S(8, uint8_t, "xaddb")
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#undef CK_PR_FAA_S
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#undef CK_PR_FAA
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/*
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* Atomic store-only unary operations.
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*/
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#define CK_PR_UNARY(K, S, T, C, I) \
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CK_PR_UNARY_R(K, S, T, C, I) \
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CK_PR_UNARY_V(K, S, T, C, I)
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#define CK_PR_UNARY_R(K, S, T, C, I) \
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CK_CC_INLINE static void \
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ck_pr_##K##_##S(T *target) \
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{ \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %0" \
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: "+m" (*(C *)target) \
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: \
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: "memory", "cc"); \
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return; \
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}
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#define CK_PR_UNARY_V(K, S, T, C, I) \
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CK_CC_INLINE static bool \
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ck_pr_##K##_##S##_is_zero(T *target) \
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{ \
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bool ret; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %0; setz %1" \
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: "+m" (*(C *)target), \
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"=qm" (ret) \
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: \
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: "memory", "cc"); \
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return ret; \
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}
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#define CK_PR_UNARY_S(K, S, T, I) CK_PR_UNARY(K, S, T, T, I)
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#define CK_PR_GENERATE(K) \
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CK_PR_UNARY(K, ptr, void, char, #K "l") \
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CK_PR_UNARY_S(K, char, char, #K "b") \
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CK_PR_UNARY_S(K, int, int, #K "l") \
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CK_PR_UNARY_S(K, uint, unsigned int, #K "l") \
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CK_PR_UNARY_S(K, 32, uint32_t, #K "l") \
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CK_PR_UNARY_S(K, 16, uint16_t, #K "w") \
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CK_PR_UNARY_S(K, 8, uint8_t, #K "b")
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CK_PR_GENERATE(inc)
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CK_PR_GENERATE(dec)
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CK_PR_GENERATE(neg)
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/* not does not affect condition flags. */
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#undef CK_PR_UNARY_V
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#define CK_PR_UNARY_V(a, b, c, d, e)
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CK_PR_GENERATE(not)
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#undef CK_PR_GENERATE
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#undef CK_PR_UNARY_S
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#undef CK_PR_UNARY_V
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#undef CK_PR_UNARY_R
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#undef CK_PR_UNARY
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/*
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* Atomic store-only binary operations.
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*/
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#define CK_PR_BINARY(K, S, M, T, C, I) \
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CK_CC_INLINE static void \
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ck_pr_##K##_##S(M *target, T d) \
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{ \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %1, %0" \
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: "+m" (*(C *)target) \
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: CK_CC_IMM "q" (d) \
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: "memory", "cc"); \
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return; \
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}
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#define CK_PR_BINARY_S(K, S, T, I) CK_PR_BINARY(K, S, T, T, T, I)
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#define CK_PR_GENERATE(K) \
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CK_PR_BINARY(K, ptr, void, uintptr_t, char, #K "l") \
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CK_PR_BINARY_S(K, char, char, #K "b") \
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CK_PR_BINARY_S(K, int, int, #K "l") \
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CK_PR_BINARY_S(K, uint, unsigned int, #K "l") \
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CK_PR_BINARY_S(K, 32, uint32_t, #K "l") \
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CK_PR_BINARY_S(K, 16, uint16_t, #K "w") \
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CK_PR_BINARY_S(K, 8, uint8_t, #K "b")
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CK_PR_GENERATE(add)
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CK_PR_GENERATE(sub)
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CK_PR_GENERATE(and)
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CK_PR_GENERATE(or)
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CK_PR_GENERATE(xor)
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#undef CK_PR_GENERATE
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#undef CK_PR_BINARY_S
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#undef CK_PR_BINARY
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/*
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* Atomic compare and swap, with a variant that sets *v to the old value of target.
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*/
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#ifdef __GCC_ASM_FLAG_OUTPUTS__
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#define CK_PR_CAS(S, M, T, C, I) \
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CK_CC_INLINE static bool \
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ck_pr_cas_##S(M *target, T compare, T set) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %3, %0" \
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: "+m" (*(C *)target), \
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"=@ccz" (z), \
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/* RAX is clobbered by cmpxchg. */ \
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"+a" (compare) \
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: "q" (set) \
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: "memory", "cc"); \
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return z; \
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} \
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\
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CK_CC_INLINE static bool \
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ck_pr_cas_##S##_value(M *target, T compare, T set, M *v) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %3, %0;" \
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: "+m" (*(C *)target), \
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"=@ccz" (z), \
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"+a" (compare) \
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: "q" (set) \
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: "memory", "cc"); \
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*(T *)v = compare; \
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return z; \
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}
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#else
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#define CK_PR_CAS(S, M, T, C, I) \
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CK_CC_INLINE static bool \
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ck_pr_cas_##S(M *target, T compare, T set) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %2, %0; setz %1" \
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: "+m" (*(C *)target), \
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"=a" (z) \
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: "q" (set), \
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"a" (compare) \
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: "memory", "cc"); \
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return z; \
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} \
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\
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CK_CC_INLINE static bool \
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ck_pr_cas_##S##_value(M *target, T compare, T set, M *v) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %3, %0;" \
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"setz %1;" \
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: "+m" (*(C *)target), \
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"=q" (z), \
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"+a" (compare) \
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: "q" (set) \
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: "memory", "cc"); \
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*(T *)v = compare; \
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return z; \
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}
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#endif
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CK_PR_CAS(ptr, void, void *, char, "cmpxchgl")
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#define CK_PR_CAS_S(S, T, I) CK_PR_CAS(S, T, T, T, I)
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CK_PR_CAS_S(char, char, "cmpxchgb")
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CK_PR_CAS_S(int, int, "cmpxchgl")
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CK_PR_CAS_S(uint, unsigned int, "cmpxchgl")
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CK_PR_CAS_S(32, uint32_t, "cmpxchgl")
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CK_PR_CAS_S(16, uint16_t, "cmpxchgw")
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CK_PR_CAS_S(8, uint8_t, "cmpxchgb")
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#undef CK_PR_CAS_S
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#undef CK_PR_CAS
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/*
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* Atomic bit test operations.
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*/
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#define CK_PR_BT(K, S, T, P, C, I) \
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CK_CC_INLINE static bool \
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ck_pr_##K##_##S(T *target, unsigned int b) \
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{ \
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bool c; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I "; setc %1" \
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: "+m" (*(C *)target), \
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"=q" (c) \
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: "q" ((P)b) \
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: "memory", "cc"); \
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return (bool)c; \
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}
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#define CK_PR_BT_S(K, S, T, I) CK_PR_BT(K, S, T, T, T, I)
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#define CK_PR_GENERATE(K) \
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CK_PR_BT(K, ptr, void, uint32_t, char, #K "l %2, %0") \
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CK_PR_BT_S(K, uint, unsigned int, #K "l %2, %0") \
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CK_PR_BT_S(K, int, int, #K "l %2, %0") \
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CK_PR_BT_S(K, 32, uint32_t, #K "l %2, %0") \
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CK_PR_BT_S(K, 16, uint16_t, #K "w %w2, %0")
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CK_PR_GENERATE(btc)
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CK_PR_GENERATE(bts)
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CK_PR_GENERATE(btr)
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#undef CK_PR_GENERATE
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#undef CK_PR_BT
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#endif /* CK_PR_X86_H */
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