From c58b0aa75520fcf64a6c373d8e5f482d946401d1 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sat, 18 May 2013 16:03:31 -0400 Subject: [PATCH] doc: Add ck_pr_fence_atomic_X manual pages. --- doc/Makefile.in | 2 + doc/ck_pr_fence_atomic_load | 106 ++++++++++++++++++++++++++++++++++ doc/ck_pr_fence_atomic_store | 107 +++++++++++++++++++++++++++++++++++ 3 files changed, 215 insertions(+) create mode 100644 doc/ck_pr_fence_atomic_load create mode 100644 doc/ck_pr_fence_atomic_store diff --git a/doc/Makefile.in b/doc/Makefile.in index 498bb06..808da6c 100644 --- a/doc/Makefile.in +++ b/doc/Makefile.in @@ -92,6 +92,8 @@ OBJECTS=ck_ht_count \ ck_pr_barrier \ ck_pr_fas \ ck_pr_fence_atomic \ + ck_pr_fence_atomic_load \ + ck_pr_fence_atomic_store \ ck_pr_fence_load \ ck_pr_fence_load_depends \ ck_pr_fence_memory \ diff --git a/doc/ck_pr_fence_atomic_load b/doc/ck_pr_fence_atomic_load new file mode 100644 index 0000000..52a54f8 --- /dev/null +++ b/doc/ck_pr_fence_atomic_load @@ -0,0 +1,106 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 16, 2013 +.Dt CK_PR_FENCE_ATOMIC_LOAD 3 +.Sh NAME +.Nm ck_pr_fence_atomic_load +.Nd enforce ordering of atomic read-modify-write operations to load operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_atomic_load void +.Ft void +.Fn ck_pr_fence_strict_atomic_load void +.Sh DESCRIPTION +The +.Fn ck_pr_fence_atomic_load +function enfores the ordering of any +atomic read-modify-write operations relative to +any load operations following the function invocation. This function +always serve as an implicit compiler barrier. On +architectures implementing CK_MD_TSO, this operation +only serves as a compiler barrier and no fences +are emitted. To force the unconditional emission of +a fence, use +.Fn ck_pr_fence_strict_atomic_load . +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static int a = 0; +static int b = 0; + +void +function(void) +{ + int c; + + ck_pr_fas_int(&a, 1); + + /* + * Guarantee that the update to a is completed + * with respect to the load of *b. + */ + ck_pr_fence_atomic_load(); + c = ck_pr_load_int(&b); + + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ diff --git a/doc/ck_pr_fence_atomic_store b/doc/ck_pr_fence_atomic_store new file mode 100644 index 0000000..31a2029 --- /dev/null +++ b/doc/ck_pr_fence_atomic_store @@ -0,0 +1,107 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 16, 2013 +.Dt CK_PR_FENCE_ATOMIC_STORE 3 +.Sh NAME +.Nm ck_pr_fence_atomic_store +.Nd enforce ordering of atomic read-modify-write operations to store operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_atomic_store void +.Ft void +.Fn ck_pr_fence_strict_atomic_store void +.Sh DESCRIPTION +The +.Fn ck_pr_fence_atomic_store +function enfores the ordering of any +atomic read-modify-write operations relative to +any load operations following the function invocation. This function +always serve as an implicit compiler barrier. On +architectures implementing CK_MD_TSO, this operation +only serves as a compiler barrier and no fences +are emitted. To force the unconditional emission of +a fence, use +.Fn ck_pr_fence_strict_atomic_store . +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static int a = 0; +static int b = 0; + +void +function(void) +{ + int c; + + ck_pr_fas_int(&a, 1); + + /* + * Guarantee that the update to a is completed + * with respect to the store into the value pointed + * to by b. + */ + ck_pr_fence_atomic_store(); + c = ck_pr_store_int(&b, 2); + + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_load 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/