From 4492325ccc2c39f8feb3155a2e822a285064dd41 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Thu, 16 May 2013 16:33:12 -0400 Subject: [PATCH 01/13] ck_hs: Migrate to ck_pr_fence_X_Y. --- src/ck_hs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ck_hs.c b/src/ck_hs.c index 6c082e9..cf7d7c0 100644 --- a/src/ck_hs.c +++ b/src/ck_hs.c @@ -421,7 +421,7 @@ restart: */ if (slot != NULL && *slot != CK_HS_EMPTY) { ck_pr_inc_uint(&map->generation[h & CK_HS_G_MASK]); - ck_pr_fence_store(); + ck_pr_fence_atomic_store(); ck_pr_store_ptr(slot, CK_HS_TOMBSTONE); } } else { From 58af5c30725734bc6f982066502f4ac8ef7eca72 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Thu, 16 May 2013 16:36:16 -0400 Subject: [PATCH 02/13] ck_epoch: Elaborate on ck_epoch_register load fence. --- src/ck_epoch.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/ck_epoch.c b/src/ck_epoch.c index 1904748..51016e5 100644 --- a/src/ck_epoch.c +++ b/src/ck_epoch.c @@ -162,6 +162,7 @@ ck_epoch_recycle(struct ck_epoch *global) record = ck_epoch_record_container(cursor); if (ck_pr_load_uint(&record->state) == CK_EPOCH_STATE_FREE) { + /* Serialize with respect to deferral list clean-up. */ ck_pr_fence_load(); state = ck_pr_fas_uint(&record->state, CK_EPOCH_STATE_USED); if (state == CK_EPOCH_STATE_FREE) { From 0d827b4c8143804b78fdd5759034395d4ed5d47a Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Thu, 16 May 2013 16:43:17 -0400 Subject: [PATCH 03/13] ck_hp_fifo: Finer-grained mapping to ck_pr_fence_X_Y. Specifically, atomic-RMW fences were previously generalized as store operations. --- include/ck_hp_fifo.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/ck_hp_fifo.h b/include/ck_hp_fifo.h index 8c0d08b..3e52afb 100644 --- a/include/ck_hp_fifo.h +++ b/include/ck_hp_fifo.h @@ -76,7 +76,7 @@ ck_hp_fifo_enqueue_mpmc(ck_hp_record_t *record, entry->value = value; entry->next = NULL; - ck_pr_fence_store(); + ck_pr_fence_store_atomic(); for (;;) { tail = ck_pr_load_ptr(&fifo->tail); @@ -93,7 +93,7 @@ ck_hp_fifo_enqueue_mpmc(ck_hp_record_t *record, break; } - ck_pr_fence_store(); + ck_pr_fence_atomic(); ck_pr_cas_ptr(&fifo->tail, tail, entry); return; } @@ -108,7 +108,7 @@ ck_hp_fifo_tryenqueue_mpmc(ck_hp_record_t *record, entry->value = value; entry->next = NULL; - ck_pr_fence_store(); + ck_pr_fence_store_atomic(); tail = ck_pr_load_ptr(&fifo->tail); ck_hp_set(record, 0, tail); @@ -123,7 +123,7 @@ ck_hp_fifo_tryenqueue_mpmc(ck_hp_record_t *record, } else if (ck_pr_cas_ptr(&fifo->tail->next, next, entry) == false) return false; - ck_pr_fence_store(); + ck_pr_fence_atomic(); ck_pr_cas_ptr(&fifo->tail, tail, entry); return true; } From e52fd0b4053b195dcec3f408b4c3030822628ba1 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Thu, 16 May 2013 16:53:52 -0400 Subject: [PATCH 04/13] ck_fifo: Migrate MPMC FIFO to ck_pr_fence_X_Y. --- include/ck_fifo.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/include/ck_fifo.h b/include/ck_fifo.h index 5805c49..cafaa63 100644 --- a/include/ck_fifo.h +++ b/include/ck_fifo.h @@ -237,7 +237,7 @@ ck_fifo_mpmc_enqueue(struct ck_fifo_mpmc *fifo, entry->value = value; entry->next.pointer = NULL; entry->next.generation = 0; - ck_pr_fence_store(); + ck_pr_fence_store_atomic(); for (;;) { tail.generation = ck_pr_load_ptr(&fifo->tail.generation); @@ -271,9 +271,10 @@ ck_fifo_mpmc_enqueue(struct ck_fifo_mpmc *fifo, } } + ck_pr_fence_atomic(); + /* After a successful insert, forward the tail to the new entry. */ update.generation = tail.generation + 1; - ck_pr_fence_store(); ck_pr_cas_ptr_2(&fifo->tail, &tail, &update); return; } @@ -289,7 +290,7 @@ ck_fifo_mpmc_tryenqueue(struct ck_fifo_mpmc *fifo, entry->next.pointer = NULL; entry->next.generation = 0; - ck_pr_fence_store(); + ck_pr_fence_store_atomic(); tail.generation = ck_pr_load_ptr(&fifo->tail.generation); ck_pr_fence_load(); @@ -322,8 +323,9 @@ ck_fifo_mpmc_tryenqueue(struct ck_fifo_mpmc *fifo, return false; } + ck_pr_fence_atomic(); + /* After a successful insert, forward the tail to the new entry. */ - ck_pr_fence_store(); update.generation = tail.generation + 1; ck_pr_cas_ptr_2(&fifo->tail, &tail, &update); return true; From 931e967f3f80466af578de6895f7c94cb3ddd206 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Thu, 16 May 2013 17:07:20 -0400 Subject: [PATCH 05/13] doc: Add ck_pr_fence_atomic manual page. --- doc/Makefile.in | 1 + doc/ck_pr_fence_atomic | 107 +++++++++++++++++++++++++++++++++++ doc/ck_pr_fence_load | 1 + doc/ck_pr_fence_load_depends | 1 + doc/ck_pr_fence_memory | 1 + doc/ck_pr_fence_store | 1 + 6 files changed, 112 insertions(+) create mode 100644 doc/ck_pr_fence_atomic diff --git a/doc/Makefile.in b/doc/Makefile.in index 397f883..498bb06 100644 --- a/doc/Makefile.in +++ b/doc/Makefile.in @@ -91,6 +91,7 @@ OBJECTS=ck_ht_count \ ck_pr \ ck_pr_barrier \ ck_pr_fas \ + ck_pr_fence_atomic \ ck_pr_fence_load \ ck_pr_fence_load_depends \ ck_pr_fence_memory \ diff --git a/doc/ck_pr_fence_atomic b/doc/ck_pr_fence_atomic new file mode 100644 index 0000000..4644828 --- /dev/null +++ b/doc/ck_pr_fence_atomic @@ -0,0 +1,107 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 16, 2013 +.Dt CK_PR_FENCE_ATOMIC 3 +.Sh NAME +.Nm ck_pr_fence_atomic +.Nd enforce partial ordering of atomic read-modify-write operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_atomic void +.Ft void +.Fn ck_pr_fence_strict_atomic void +.Sh DESCRIPTION +The +.Fn ck_pr_fence_atomic +function enfores the ordering of any +atomic read-modify-write operations relative to +the invocation of the function. This function +always serve as an implicit compiler barrier. On +architectures implementing CK_MD_TSO, this operation +only serves as a compiler barrier and no fences +are emitted. On architectures implementing +CK_MD_PSO and CK_MD_RMO, a store fence is +emitted. To force the unconditional emission of +a fence, use +.Fn ck_pr_fence_strict_atomic . +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static int a = 0; +static int b = 0; +static int c = 0; + +void +function(void) +{ + + ck_pr_fas_int(&a, 1); + + /* + * Guarantee that the update to a is completed + * with respect to the updates of b and c. + */ + ck_pr_fence_atomic(); + ck_pr_fas_int(&b, 2); + ck_pr_fas_int(&c, 2); + + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ diff --git a/doc/ck_pr_fence_load b/doc/ck_pr_fence_load index 97cb848..d2dcd2b 100644 --- a/doc/ck_pr_fence_load +++ b/doc/ck_pr_fence_load @@ -83,6 +83,7 @@ function(void) This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_memory 3 , diff --git a/doc/ck_pr_fence_load_depends b/doc/ck_pr_fence_load_depends index 7a98389..d9d1e28 100644 --- a/doc/ck_pr_fence_load_depends +++ b/doc/ck_pr_fence_load_depends @@ -45,6 +45,7 @@ which re-orders data-dependent loads (such as the defunct Alpha), this function This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , .Xr ck_pr_fence_load 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_memory 3 , diff --git a/doc/ck_pr_fence_memory b/doc/ck_pr_fence_memory index 31eed57..116a180 100644 --- a/doc/ck_pr_fence_memory +++ b/doc/ck_pr_fence_memory @@ -85,6 +85,7 @@ function(void) This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , .Xr ck_pr_fence_load 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_store 3 , diff --git a/doc/ck_pr_fence_store b/doc/ck_pr_fence_store index 0fa573d..0673d3b 100644 --- a/doc/ck_pr_fence_store +++ b/doc/ck_pr_fence_store @@ -82,6 +82,7 @@ function(void) This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , .Xr ck_pr_fence_load 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_memory 3 , From c58b0aa75520fcf64a6c373d8e5f482d946401d1 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sat, 18 May 2013 16:03:31 -0400 Subject: [PATCH 06/13] doc: Add ck_pr_fence_atomic_X manual pages. --- doc/Makefile.in | 2 + doc/ck_pr_fence_atomic_load | 106 ++++++++++++++++++++++++++++++++++ doc/ck_pr_fence_atomic_store | 107 +++++++++++++++++++++++++++++++++++ 3 files changed, 215 insertions(+) create mode 100644 doc/ck_pr_fence_atomic_load create mode 100644 doc/ck_pr_fence_atomic_store diff --git a/doc/Makefile.in b/doc/Makefile.in index 498bb06..808da6c 100644 --- a/doc/Makefile.in +++ b/doc/Makefile.in @@ -92,6 +92,8 @@ OBJECTS=ck_ht_count \ ck_pr_barrier \ ck_pr_fas \ ck_pr_fence_atomic \ + ck_pr_fence_atomic_load \ + ck_pr_fence_atomic_store \ ck_pr_fence_load \ ck_pr_fence_load_depends \ ck_pr_fence_memory \ diff --git a/doc/ck_pr_fence_atomic_load b/doc/ck_pr_fence_atomic_load new file mode 100644 index 0000000..52a54f8 --- /dev/null +++ b/doc/ck_pr_fence_atomic_load @@ -0,0 +1,106 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 16, 2013 +.Dt CK_PR_FENCE_ATOMIC_LOAD 3 +.Sh NAME +.Nm ck_pr_fence_atomic_load +.Nd enforce ordering of atomic read-modify-write operations to load operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_atomic_load void +.Ft void +.Fn ck_pr_fence_strict_atomic_load void +.Sh DESCRIPTION +The +.Fn ck_pr_fence_atomic_load +function enfores the ordering of any +atomic read-modify-write operations relative to +any load operations following the function invocation. This function +always serve as an implicit compiler barrier. On +architectures implementing CK_MD_TSO, this operation +only serves as a compiler barrier and no fences +are emitted. To force the unconditional emission of +a fence, use +.Fn ck_pr_fence_strict_atomic_load . +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static int a = 0; +static int b = 0; + +void +function(void) +{ + int c; + + ck_pr_fas_int(&a, 1); + + /* + * Guarantee that the update to a is completed + * with respect to the load of *b. + */ + ck_pr_fence_atomic_load(); + c = ck_pr_load_int(&b); + + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ diff --git a/doc/ck_pr_fence_atomic_store b/doc/ck_pr_fence_atomic_store new file mode 100644 index 0000000..31a2029 --- /dev/null +++ b/doc/ck_pr_fence_atomic_store @@ -0,0 +1,107 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 16, 2013 +.Dt CK_PR_FENCE_ATOMIC_STORE 3 +.Sh NAME +.Nm ck_pr_fence_atomic_store +.Nd enforce ordering of atomic read-modify-write operations to store operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_atomic_store void +.Ft void +.Fn ck_pr_fence_strict_atomic_store void +.Sh DESCRIPTION +The +.Fn ck_pr_fence_atomic_store +function enfores the ordering of any +atomic read-modify-write operations relative to +any load operations following the function invocation. This function +always serve as an implicit compiler barrier. On +architectures implementing CK_MD_TSO, this operation +only serves as a compiler barrier and no fences +are emitted. To force the unconditional emission of +a fence, use +.Fn ck_pr_fence_strict_atomic_store . +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static int a = 0; +static int b = 0; + +void +function(void) +{ + int c; + + ck_pr_fas_int(&a, 1); + + /* + * Guarantee that the update to a is completed + * with respect to the store into the value pointed + * to by b. + */ + ck_pr_fence_atomic_store(); + c = ck_pr_store_int(&b, 2); + + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_load 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ From c2e99fa43e20fef70643f803b7d416e92e1be178 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sat, 18 May 2013 16:04:55 -0400 Subject: [PATCH 07/13] doc: Add references to ck_pr_fence_atomic_X. --- doc/ck_pr_fence_atomic | 2 ++ doc/ck_pr_fence_load | 2 ++ doc/ck_pr_fence_load_depends | 2 ++ doc/ck_pr_fence_memory | 2 ++ doc/ck_pr_fence_store | 2 ++ 5 files changed, 10 insertions(+) diff --git a/doc/ck_pr_fence_atomic b/doc/ck_pr_fence_atomic index 4644828..162d5d4 100644 --- a/doc/ck_pr_fence_atomic +++ b/doc/ck_pr_fence_atomic @@ -81,6 +81,8 @@ function(void) This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_load 3 , .Xr ck_pr_fence_load_depends 3 , diff --git a/doc/ck_pr_fence_load b/doc/ck_pr_fence_load index d2dcd2b..3729d45 100644 --- a/doc/ck_pr_fence_load +++ b/doc/ck_pr_fence_load @@ -84,6 +84,8 @@ This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , .Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_memory 3 , diff --git a/doc/ck_pr_fence_load_depends b/doc/ck_pr_fence_load_depends index d9d1e28..29410a4 100644 --- a/doc/ck_pr_fence_load_depends +++ b/doc/ck_pr_fence_load_depends @@ -46,6 +46,8 @@ This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , .Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_load 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_memory 3 , diff --git a/doc/ck_pr_fence_memory b/doc/ck_pr_fence_memory index 116a180..f223527 100644 --- a/doc/ck_pr_fence_memory +++ b/doc/ck_pr_fence_memory @@ -86,6 +86,8 @@ This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , .Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_load 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_store 3 , diff --git a/doc/ck_pr_fence_store b/doc/ck_pr_fence_store index 0673d3b..4162fc6 100644 --- a/doc/ck_pr_fence_store +++ b/doc/ck_pr_fence_store @@ -83,6 +83,8 @@ This function has no return value. .Sh SEE ALSO .Xr ck_pr_stall 3 , .Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_load 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_memory 3 , From adbdfe663306d960f880603ce46230b47d74062e Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sat, 18 May 2013 16:08:18 -0400 Subject: [PATCH 08/13] ck_pr: Get rid of ck_pr_fence_X_X functions. These add unnecessary complexity to the ck_pr_fence interface. Instead, it can be safely assumed that developers will use ck_pr_fence_X to enforce X -> X ordering. --- include/ck_pr.h | 9 --------- include/gcc/ppc/ck_pr.h | 3 --- include/gcc/ppc64/ck_pr.h | 3 --- include/gcc/sparcv9/ck_pr.h | 3 --- include/gcc/x86/ck_pr.h | 3 --- include/gcc/x86_64/ck_pr.h | 2 -- 6 files changed, 23 deletions(-) diff --git a/include/ck_pr.h b/include/ck_pr.h index e7c98f7..2d49f62 100644 --- a/include/ck_pr.h +++ b/include/ck_pr.h @@ -82,14 +82,11 @@ CK_PR_FENCE_NOOP(load_depends) * ordering. */ CK_PR_FENCE_EMIT(atomic) -CK_PR_FENCE_EMIT(atomic_atomic) CK_PR_FENCE_EMIT(atomic_load) CK_PR_FENCE_EMIT(atomic_store) CK_PR_FENCE_EMIT(store_atomic) CK_PR_FENCE_EMIT(load_atomic) -CK_PR_FENCE_EMIT(load_load) CK_PR_FENCE_EMIT(load_store) -CK_PR_FENCE_EMIT(store_store) CK_PR_FENCE_EMIT(store_load) CK_PR_FENCE_EMIT(load) CK_PR_FENCE_EMIT(store) @@ -100,14 +97,11 @@ CK_PR_FENCE_EMIT(memory) * Otherwise, loads are executed in-order. */ CK_PR_FENCE_EMIT(atomic) -CK_PR_FENCE_EMIT(atomic_atomic) CK_PR_FENCE_NOOP(atomic_load) CK_PR_FENCE_EMIT(atomic_store) CK_PR_FENCE_EMIT(store_atomic) CK_PR_FENCE_NOOP(load_atomic) -CK_PR_FENCE_NOOP(load_load) CK_PR_FENCE_EMIT(load_store) -CK_PR_FENCE_EMIT(store_store) CK_PR_FENCE_EMIT(store_load) CK_PR_FENCE_NOOP(load) CK_PR_FENCE_EMIT(store) @@ -118,14 +112,11 @@ CK_PR_FENCE_EMIT(memory) * prior stores. Atomic operations are serializing. */ CK_PR_FENCE_NOOP(atomic) -CK_PR_FENCE_NOOP(atomic_atomic) CK_PR_FENCE_NOOP(atomic_load) CK_PR_FENCE_NOOP(atomic_store) CK_PR_FENCE_NOOP(store_atomic) CK_PR_FENCE_NOOP(load_atomic) -CK_PR_FENCE_NOOP(load_load) CK_PR_FENCE_NOOP(load_store) -CK_PR_FENCE_NOOP(store_store) CK_PR_FENCE_EMIT(store_load) CK_PR_FENCE_NOOP(load) CK_PR_FENCE_NOOP(store) diff --git a/include/gcc/ppc/ck_pr.h b/include/gcc/ppc/ck_pr.h index 7a7d0df..04d330d 100644 --- a/include/gcc/ppc/ck_pr.h +++ b/include/gcc/ppc/ck_pr.h @@ -68,16 +68,13 @@ ck_pr_stall(void) } CK_PR_FENCE(atomic, "lwsync") -CK_PR_FENCE(atomic_atomic, "lwsync") CK_PR_FENCE(atomic_store, "lwsync") CK_PR_FENCE(atomic_load, "sync") CK_PR_FENCE(store_atomic, "lwsync") CK_PR_FENCE(load_atomic, "lwsync") CK_PR_FENCE(store, "lwsync") -CK_PR_FENCE(store_store, "lwsync") CK_PR_FENCE(store_load, "sync") CK_PR_FENCE(load, "lwsync") -CK_PR_FENCE(load_load, "lwsync") CK_PR_FENCE(load_store, "lwsync") CK_PR_FENCE(memory, "sync") diff --git a/include/gcc/ppc64/ck_pr.h b/include/gcc/ppc64/ck_pr.h index 2aa145d..e00db85 100644 --- a/include/gcc/ppc64/ck_pr.h +++ b/include/gcc/ppc64/ck_pr.h @@ -71,16 +71,13 @@ ck_pr_stall(void) * http://www.ibm.com/developerworks/systems/articles/powerpc.html */ CK_PR_FENCE(atomic, "lwsync") -CK_PR_FENCE(atomic_atomic, "lwsync") CK_PR_FENCE(atomic_store, "lwsync") CK_PR_FENCE(atomic_load, "sync") CK_PR_FENCE(store_atomic, "lwsync") CK_PR_FENCE(load_atomic, "lwsync") CK_PR_FENCE(store, "lwsync") -CK_PR_FENCE(store_store, "lwsync") CK_PR_FENCE(store_load, "sync") CK_PR_FENCE(load, "lwsync") -CK_PR_FENCE(load_load, "lwsync") CK_PR_FENCE(load_store, "lwsync") CK_PR_FENCE(memory, "sync") diff --git a/include/gcc/sparcv9/ck_pr.h b/include/gcc/sparcv9/ck_pr.h index 076e378..7bd5315 100644 --- a/include/gcc/sparcv9/ck_pr.h +++ b/include/gcc/sparcv9/ck_pr.h @@ -67,17 +67,14 @@ ck_pr_stall(void) * Atomic operations are treated as both load and store * operations on SPARCv9. */ -CK_PR_FENCE(atomic_atomic, "membar #StoreStore") CK_PR_FENCE(atomic, "membar #StoreStore") CK_PR_FENCE(atomic_store, "membar #StoreStore") CK_PR_FENCE(atomic_load, "membar #StoreLoad") CK_PR_FENCE(store_atomic, "membar #StoreStore") CK_PR_FENCE(load_atomic, "membar #LoadStore") CK_PR_FENCE(store, "membar #StoreStore") -CK_PR_FENCE(store_store, "membar #StoreStore") CK_PR_FENCE(store_load, "membar #StoreLoad") CK_PR_FENCE(load, "membar #LoadLoad") -CK_PR_FENCE(load_load, "membar #LoadLoad") CK_PR_FENCE(load_store, "membar #LoadStore") CK_PR_FENCE(memory, "membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad") diff --git a/include/gcc/x86/ck_pr.h b/include/gcc/x86/ck_pr.h index bbed9bf..46583fe 100644 --- a/include/gcc/x86/ck_pr.h +++ b/include/gcc/x86/ck_pr.h @@ -71,16 +71,13 @@ ck_pr_stall(void) } CK_PR_FENCE(atomic, "sfence") -CK_PR_FENCE(atomic_atomic, "sfence") CK_PR_FENCE(atomic_store, "sfence") CK_PR_FENCE(atomic_load, "mfence") CK_PR_FENCE(store_atomic, "sfence") CK_PR_FENCE(load_atomic, "mfence") CK_PR_FENCE(load, "lfence") -CK_PR_FENCE(load_load, "lfence") CK_PR_FENCE(load_store, "mfence") CK_PR_FENCE(store, "sfence") -CK_PR_FENCE(store_store, "sfence") CK_PR_FENCE(store_load, "mfence") CK_PR_FENCE(memory, "mfence") diff --git a/include/gcc/x86_64/ck_pr.h b/include/gcc/x86_64/ck_pr.h index b0813e4..524b45e 100644 --- a/include/gcc/x86_64/ck_pr.h +++ b/include/gcc/x86_64/ck_pr.h @@ -74,10 +74,8 @@ CK_PR_FENCE(atomic_load, "mfence") CK_PR_FENCE(store_atomic, "sfence") CK_PR_FENCE(load_atomic, "mfence") CK_PR_FENCE(load, "lfence") -CK_PR_FENCE(load_load, "lfence") CK_PR_FENCE(load_store, "mfence") CK_PR_FENCE(store, "sfence") -CK_PR_FENCE(store_store, "sfence") CK_PR_FENCE(store_load, "mfence") CK_PR_FENCE(memory, "mfence") From d12388f5f7c742ee773e23184bbbbd8b1c9be6e6 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sat, 18 May 2013 16:52:21 -0400 Subject: [PATCH 09/13] doc: Add ck_pr_fence_load_X manual pages. --- doc/Makefile.in | 2 + doc/ck_pr_fence_atomic | 2 + doc/ck_pr_fence_atomic_load | 2 + doc/ck_pr_fence_atomic_store | 2 + doc/ck_pr_fence_load | 2 + doc/ck_pr_fence_load_atomic | 113 +++++++++++++++++++++++++++++++++++ doc/ck_pr_fence_load_depends | 2 + doc/ck_pr_fence_load_store | 113 +++++++++++++++++++++++++++++++++++ doc/ck_pr_fence_store | 2 + 9 files changed, 240 insertions(+) create mode 100644 doc/ck_pr_fence_load_atomic create mode 100644 doc/ck_pr_fence_load_store diff --git a/doc/Makefile.in b/doc/Makefile.in index 808da6c..b2456e2 100644 --- a/doc/Makefile.in +++ b/doc/Makefile.in @@ -95,6 +95,8 @@ OBJECTS=ck_ht_count \ ck_pr_fence_atomic_load \ ck_pr_fence_atomic_store \ ck_pr_fence_load \ + ck_pr_fence_load_atomic \ + ck_pr_fence_load_store \ ck_pr_fence_load_depends \ ck_pr_fence_memory \ ck_pr_fence_store \ diff --git a/doc/ck_pr_fence_atomic b/doc/ck_pr_fence_atomic index 162d5d4..452606b 100644 --- a/doc/ck_pr_fence_atomic +++ b/doc/ck_pr_fence_atomic @@ -85,6 +85,8 @@ This function has no return value. .Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_memory 3 , .Xr ck_pr_barrier 3 , diff --git a/doc/ck_pr_fence_atomic_load b/doc/ck_pr_fence_atomic_load index 52a54f8..cbefdaa 100644 --- a/doc/ck_pr_fence_atomic_load +++ b/doc/ck_pr_fence_atomic_load @@ -82,6 +82,8 @@ This function has no return value. .Xr ck_pr_fence_atomic_store 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_memory 3 , .Xr ck_pr_barrier 3 , diff --git a/doc/ck_pr_fence_atomic_store b/doc/ck_pr_fence_atomic_store index 31a2029..a14867c 100644 --- a/doc/ck_pr_fence_atomic_store +++ b/doc/ck_pr_fence_atomic_store @@ -83,6 +83,8 @@ This function has no return value. .Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_memory 3 , .Xr ck_pr_barrier 3 , diff --git a/doc/ck_pr_fence_load b/doc/ck_pr_fence_load index 3729d45..da8e6d4 100644 --- a/doc/ck_pr_fence_load +++ b/doc/ck_pr_fence_load @@ -86,6 +86,8 @@ This function has no return value. .Xr ck_pr_fence_atomic 3 , .Xr ck_pr_fence_atomic_store 3 , .Xr ck_pr_fence_atomic_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_memory 3 , diff --git a/doc/ck_pr_fence_load_atomic b/doc/ck_pr_fence_load_atomic new file mode 100644 index 0000000..774a263 --- /dev/null +++ b/doc/ck_pr_fence_load_atomic @@ -0,0 +1,113 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 18, 2013 +.Dt CK_PR_FENCE_LOAD_ATOMIC 3 +.Sh NAME +.Nm ck_pr_fence_load_atomic +.Nd enforce ordering of load operations to atomic read-modify-write operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_load_atomic void +.Ft void +.Fn ck_pr_fence_strict_load_atomic void +.Sh DESCRIPTION +This function enforces the ordering of any memory load +and +.Fn ck_pr_load 3 +operations with respect to store operations relative to +the invocation of the function. Any store operations that +were committed on remote processors +and received by the calling processor before the invocation of +.Fn ck_pr_fence_load_atomic +is also be made visible only after a call to +the ck_pr_fence_load family of functions. +This function always serves as an implicit compiler barrier. +On architectures with CK_MD_TSO or CK_MD_PSO specified (total store ordering +and partial store ordering respectively), this operation only serves +as a compiler barrier and no fence instructions will be emitted. To +force the unconditional emission of a load fence, use +.Fn ck_pr_fence_strict_load_atomic . +Architectures implementing CK_MD_RMO always emit a fence. +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static unsigned int a; +static unsigned int b; + +void +function(void) +{ + unsigned int snapshot_a, snapshot_b; + + snapshot_a = ck_pr_load_uint(&a); + + /* + * Guarantee that the load from "a" completes + * before the update to "b". + */ + ck_pr_fence_load_atomic(); + ck_pr_fas_uint(&b, 1); + + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_load_store 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ diff --git a/doc/ck_pr_fence_load_depends b/doc/ck_pr_fence_load_depends index 29410a4..38718ec 100644 --- a/doc/ck_pr_fence_load_depends +++ b/doc/ck_pr_fence_load_depends @@ -49,6 +49,8 @@ This function has no return value. .Xr ck_pr_fence_atomic_store 3 , .Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , .Xr ck_pr_fence_store 3 , .Xr ck_pr_fence_memory 3 , .Xr ck_pr_barrier 3 , diff --git a/doc/ck_pr_fence_load_store b/doc/ck_pr_fence_load_store new file mode 100644 index 0000000..378903e --- /dev/null +++ b/doc/ck_pr_fence_load_store @@ -0,0 +1,113 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 18, 2013 +.Dt CK_PR_FENCE_LOAD_STORE 3 +.Sh NAME +.Nm ck_pr_fence_load_store +.Nd enforce ordering of load operations to store operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_load_store void +.Ft void +.Fn ck_pr_fence_strict_load_store void +.Sh DESCRIPTION +This function enforces the ordering of any memory load +and +.Fn ck_pr_load 3 +operations with respect to store operations relative to +the invocation of the function. Any store operations that +were committed on remote processors +and received by the calling processor before the invocation of +.Fn ck_pr_fence_load_store +is also be made visible only after a call to +the ck_pr_fence_load family of functions. +This function always serves as an implicit compiler barrier. +On architectures with CK_MD_TSO or CK_MD_PSO specified (total store ordering +and partial store ordering respectively), this operation only serves +as a compiler barrier and no fence instructions will be emitted. To +force the unconditional emission of a load fence, use +.Fn ck_pr_fence_strict_load_store . +Architectures implementing CK_MD_RMO always emit a fence. +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static unsigned int a; +static unsigned int b; + +void +function(void) +{ + unsigned int snapshot_a; + + snapshot_a = ck_pr_load_uint(&a); + + /* + * Guarantee that the load from "a" completes + * before the store to "b". + */ + ck_pr_fence_load_store(); + ck_pr_store_uint(&b, 1); + + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ diff --git a/doc/ck_pr_fence_store b/doc/ck_pr_fence_store index 4162fc6..5bb8f00 100644 --- a/doc/ck_pr_fence_store +++ b/doc/ck_pr_fence_store @@ -86,6 +86,8 @@ This function has no return value. .Xr ck_pr_fence_atomic_store 3 , .Xr ck_pr_fence_atomic_load 3 , .Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , .Xr ck_pr_fence_load_depends 3 , .Xr ck_pr_fence_memory 3 , .Xr ck_pr_barrier 3 , From 005dd36adef191cc26e172bbf120a7111c8ba6b5 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sat, 18 May 2013 17:01:12 -0400 Subject: [PATCH 10/13] doc: Add ck_pr_fence_store_X manual pages. --- doc/Makefile.in | 2 + doc/ck_pr_fence_store_atomic | 108 +++++++++++++++++++++++++++++++++++ doc/ck_pr_fence_store_load | 107 ++++++++++++++++++++++++++++++++++ 3 files changed, 217 insertions(+) create mode 100644 doc/ck_pr_fence_store_atomic create mode 100644 doc/ck_pr_fence_store_load diff --git a/doc/Makefile.in b/doc/Makefile.in index b2456e2..df8d7e8 100644 --- a/doc/Makefile.in +++ b/doc/Makefile.in @@ -100,6 +100,8 @@ OBJECTS=ck_ht_count \ ck_pr_fence_load_depends \ ck_pr_fence_memory \ ck_pr_fence_store \ + ck_pr_fence_store_atomic \ + ck_pr_fence_store_load \ ck_pr_stall \ ck_pr_faa \ ck_pr_inc \ diff --git a/doc/ck_pr_fence_store_atomic b/doc/ck_pr_fence_store_atomic new file mode 100644 index 0000000..a559f22 --- /dev/null +++ b/doc/ck_pr_fence_store_atomic @@ -0,0 +1,108 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 18, 2013 +.Dt CK_PR_FENCE_STORE_ATOMIC 3 +.Sh NAME +.Nm ck_pr_fence_store_atomic +.Nd enforce ordering of store operations to load operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_store_atomic void +.Ft void +.Fn ck_pr_fence_strict_store_atomic void +.Sh DESCRIPTION +The +.Fn ck_pr_fence_store_atomic +function enfores the ordering of any memory store, +.Fn ck_pr_store +and atomic read-modify-write operations to atomic read-modify-write +operations relative to the invocation of the function. This function +always serve as an implicit compiler barrier. +This functions will emit a fence for PSO and RMO +targets. In order to force the emission of a fence use the +.Fn ck_pr_fence_strict_store_atomic +function. +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static int a = 0; +static int b = 0; + +void +function(void) +{ + + ck_pr_store_int(&a, 1); + + /* + * Guarantee that the store to a is completed + * with respect to the update of b. + */ + ck_pr_fence_store_atomic(); + ck_pr_add_int(&b, 2); + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , +.Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_store_load 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ diff --git a/doc/ck_pr_fence_store_load b/doc/ck_pr_fence_store_load new file mode 100644 index 0000000..40d1875 --- /dev/null +++ b/doc/ck_pr_fence_store_load @@ -0,0 +1,107 @@ +.\" +.\" Copyright 2013 Samy Al Bahra. +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" +.Dd May 18, 2013 +.Dt CK_PR_FENCE_STORE_LOAD 3 +.Sh NAME +.Nm ck_pr_fence_store_load +.Nd enforce ordering of store operations to load operations +.Sh LIBRARY +Concurrency Kit (libck, \-lck) +.Sh SYNOPSIS +.In ck_pr.h +.Ft void +.Fn ck_pr_fence_store_load void +.Ft void +.Fn ck_pr_fence_strict_store_load void +.Sh DESCRIPTION +The +.Fn ck_pr_fence_store_load +function enfores the ordering of any memory store, +.Fn ck_pr_store +and atomic read-modify-write operations to load +operations relative to the invocation of the function. This function +always serve as an implicit compiler barrier. +A fence will currently always be emitted for this +operation, including for TSO memory model targets. +.Sh EXAMPLE +.Bd -literal -offset indent + +#include + +static int a = 0; +static int b = 0; + +void +function(void) +{ + unsigned int snapshot_b; + + ck_pr_store_int(&a, 1); + + /* + * Guarantee that the store to a is completed + * with respect to load from b. + */ + ck_pr_fence_store_load(); + snapshot_b = ck_pr_load_int(&b, 2); + return; +} +.Ed +.Sh RETURN VALUES +This function has no return value. +.Sh SEE ALSO +.Xr ck_pr_stall 3 , +.Xr ck_pr_fence_atomic 3 , +.Xr ck_pr_fence_atomic_store 3 , +.Xr ck_pr_fence_atomic_load 3 , +.Xr ck_pr_fence_load 3 , +.Xr ck_pr_fence_load_atomic 3 , +.Xr ck_pr_fence_load_store 3 , +.Xr ck_pr_fence_load_depends 3 , +.Xr ck_pr_fence_store 3 , +.Xr ck_pr_fence_store_atomic 3 , +.Xr ck_pr_fence_memory 3 , +.Xr ck_pr_barrier 3 , +.Xr ck_pr_fas 3 , +.Xr ck_pr_load 3 , +.Xr ck_pr_store 3 , +.Xr ck_pr_faa 3 , +.Xr ck_pr_inc 3 , +.Xr ck_pr_dec 3 , +.Xr ck_pr_neg 3 , +.Xr ck_pr_not 3 , +.Xr ck_pr_add 3 , +.Xr ck_pr_sub 3 , +.Xr ck_pr_and 3 , +.Xr ck_pr_or 3 , +.Xr ck_pr_xor 3 , +.Xr ck_pr_cas 3 , +.Xr ck_pr_btc 3 , +.Xr ck_pr_bts 3 , +.Xr ck_pr_btr 3 +.Pp +Additional information available at http://concurrencykit.org/ From b1a40dcc343c0b483cf00baf7df84df3acb8fa40 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sun, 19 May 2013 22:35:12 -0400 Subject: [PATCH 11/13] build: Only copy generated files if out-of-source. --- configure | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/configure b/configure index f4df79d..e439ace 100755 --- a/configure +++ b/configure @@ -579,11 +579,10 @@ mkdir -p $P_PWD/src if test "$P_PWD" '!=' "$BUILD_DIR"; then mkdir -p $P_PWD/regressions cp $BUILD_DIR/regressions/Makefile.unsupported $P_PWD/regressions/Makefile &> /dev/null + cp $BUILD_DIR/build/ck.build.$PROFILE $P_PWD/build/ck.build.$PROFILE &> /dev/null + cp $BUILD_DIR/include/ck_md.h $P_PWD/include/ck_md.h &> /dev/null fi -cp $BUILD_DIR/build/ck.build.$PROFILE $P_PWD/build/ck.build.$PROFILE &> /dev/null -cp $BUILD_DIR/include/ck_md.h $P_PWD/include/ck_md.h &> /dev/null - generate src/Makefile.in $P_PWD/src/Makefile generate doc/Makefile.in $P_PWD/doc/Makefile generate build/ck.build.in $P_PWD/build/ck.build From a5e8d6ad4571699026fc9975735d1fa024a818c8 Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Tue, 21 May 2013 19:53:44 -0400 Subject: [PATCH 12/13] ck_spinlock: Only enable trylock for ck_spinlock_ticket on x86*. trylock algorithm semantics are not cleanly defined outside of x86. --- include/ck_spinlock.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/ck_spinlock.h b/include/ck_spinlock.h index 323de5c..b78051b 100644 --- a/include/ck_spinlock.h +++ b/include/ck_spinlock.h @@ -408,9 +408,9 @@ ck_spinlock_dec_unlock(struct ck_spinlock_dec *lock) /* * If 16-bit or 32-bit increment is supported, implement support for * trylock functionality on availability of 32-bit or 64-bit fetch-and-add - * and compare-and-swap. + * and compare-and-swap. This code path is only applied to x86*. */ -#if defined(CK_MD_TSO) +#if defined(CK_MD_TSO) && (defined(__x86__) || defined(__x86_64__)) #if defined(CK_F_PR_FAA_32) && defined(CK_F_PR_INC_16) && defined(CK_F_PR_CAS_32) #define CK_SPINLOCK_TICKET_TYPE uint32_t #define CK_SPINLOCK_TICKET_TYPE_BASE uint16_t From 3ca7072c146b62dd800e51ed5b3e49e7af5adeed Mon Sep 17 00:00:00 2001 From: Samy Al Bahra Date: Sat, 25 May 2013 14:08:30 -0400 Subject: [PATCH 13/13] ck_pr: Implicit compiler barrier ck_pr_fence. I accidentally removed ck_pr_fence implicit compiler barrier semantics in re-structure of ck_pr_fence. This does affect the correctness of any data structures in ck_pr_fence or the correctness of consumers of ck_pr operations where ck_pr serves as linearization points. The reason it does not affect any CK data structures is that explicit compiler barriers (whether they are store/load operations or atomic ready-modify-write operations) always serve as linearization points. However, if consumers are doing tricky things like using these barriers to serialize aliased locations for correctness, then it is possible for compiler re-ordering to bite them in the ass. --- include/ck_pr.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/ck_pr.h b/include/ck_pr.h index 2d49f62..b3e8094 100644 --- a/include/ck_pr.h +++ b/include/ck_pr.h @@ -57,11 +57,13 @@ ck_pr_fence_##T(void) \ { \ ck_pr_fence_strict_##T(); \ + return; \ } #define CK_PR_FENCE_NOOP(T) \ CK_CC_INLINE static void \ ck_pr_fence_##T(void) \ { \ + ck_pr_barrier(); \ return; \ }