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@ -80,7 +80,7 @@ ck_pr_stall(void)
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#endif /* !CK_MD_RMO && !CK_MD_PSO */
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CK_PR_FENCE(load_depends, "")
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CK_PR_FENCE(store, "eieio")
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CK_PR_FENCE(store, "lwsync")
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CK_PR_FENCE(load, "lwsync")
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CK_PR_FENCE(memory, "sync")
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@ -152,15 +152,13 @@ CK_PR_STORE_S(char, char, "stb")
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ck_pr_cas_##N##_value(T *target, T compare, T set, T *value) \
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{ \
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T previous; \
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__asm__ __volatile__("isync;" \
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"1:" \
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__asm__ __volatile__("1:" \
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"lwarx %0, 0, %1;" \
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"cmpw 0, %0, %3;" \
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"bne- 2f;" \
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"stwcx. %2, 0, %1;" \
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"bne- 1b;" \
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"2:" \
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"lwsync;" \
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: "=&r" (previous) \
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: "r" (target), \
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"r" (set), \
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@ -173,15 +171,13 @@ CK_PR_STORE_S(char, char, "stb")
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ck_pr_cas_##N(T *target, T compare, T set) \
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{ \
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T previous; \
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__asm__ __volatile__("isync;" \
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"1:" \
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__asm__ __volatile__("1:" \
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"lwarx %0, 0, %1;" \
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"cmpw 0, %0, %3;" \
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"bne- 2f;" \
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"stwcx. %2, 0, %1;" \
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"bne- 1b;" \
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"2:" \
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"lwsync;" \
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: "=&r" (previous) \
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: "r" (target), \
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"r" (set), \
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@ -202,12 +198,10 @@ CK_PR_CAS(int, int)
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ck_pr_fas_##N(M *target, T v) \
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{ \
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T previous; \
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__asm__ __volatile__("isync;" \
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"1:" \
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__asm__ __volatile__("1:" \
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"l" W "arx %0, 0, %1;" \
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"st" W "cx. %2, 0, %1;" \
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"bne- 1b;" \
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"lwsync;" \
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: "=&r" (previous) \
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: "r" (target), \
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"r" (v) \
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@ -298,13 +292,11 @@ ck_pr_faa_ptr(void *target, uintptr_t delta)
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{
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uintptr_t previous, r;
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__asm__ __volatile__("isync;"
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"1:"
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__asm__ __volatile__("1:"
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"lwarx %0, 0, %2;"
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"add %1, %3, %0;"
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"stwcx. %1, 0, %2;"
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"bne- 1b;"
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"lwsync;"
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: "=&r" (previous),
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"=&r" (r)
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: "r" (target),
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@ -319,13 +311,11 @@ ck_pr_faa_ptr(void *target, uintptr_t delta)
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ck_pr_faa_##S(T *target, T delta) \
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{ \
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T previous, r; \
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__asm__ __volatile__("isync;" \
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"1:" \
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__asm__ __volatile__("1:" \
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"l" W "arx %0, 0, %2;" \
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"add %1, %3, %0;" \
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"st" W "cx. %1, 0, %2;" \
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"bne- 1b;" \
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"lwsync;" \
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: "=&r" (previous), \
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"=&r" (r) \
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: "r" (target), \
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